Architecture of Uni processor System:
- The von Neumann Architecture
Developed by John Von Neumann (1903-1957), is a stored computer program. Its hardware implements a cycle i.e. Fetch ->decode->execute. The Von Neumann Architecture purpose was to store the program instructions right with the data. This concept was proposed back in 19th century.
There are total of four sub-components of von Neumann Architecture:
- Control unit
- Arithmetic Logic Unit (ALU)
- Input/Output (I/O)
A bus can also be considered its sub-component as it is responsible for moving data from one sub-component to other. Von Neumann architecture is simple to understand.
Control unit of the Von Neumann Architecture consists of:
- Program counter
- Instruction register
- Simple register
Control unit major parameters are speed, complexity, reliability and flexibility. Its goal is to minimize instruction cycle.
What is the purpose of ALU then , lets see that ?
The Arithmetic Logic unit is the brain of the Processor. It contains a register called an accumulator which performs operations and tasks.
What is a memory then? What it consists of?
There are different kinds of memory
Important Parameters to be considered in case of memory
- Access time
- Cycle time
- Power consumption
- Error detection
Architecture of Multiprocessor Systems:
Symmetric Multiprocessor Systems
SMP as the name implies contains multiple processors, with common access to all memory modules. Multiple processors are connected via a bus in computer system. Different memory modules form a single address space in computer system. The access time from memory to all processors is equal. A common symmetrical multi-processor system is IBM eServer P5 595 , which can have up to 64 processors.
Each processor in SMP has its own cache, so it makes task easier for processor and hence faster. To handle many processors can be difficult to manage by a single bus which is a bottleneck if a system has many processors. In short Symmetrical Multi-processor Systems are not scalable.